Let's start with a simple example where only two chips have to communicate together.
SPI requires 4 wires to be used in between the two chips.
As you can see, the wires are called SCK, MOSI, MISO and SSEL, and one of the chip is called the SPI master, while the other the SPI slave.
Because SPI is synchronous and full-duplex, every time the clock toggles, two bits are actually transmitted (one in each direction).
Let's assume that the master and slave expect 8-bits data transfers, with MSB transmitted first.
Here's how would look a single 8-bits data transfer.
The line MOSI is the "master output" while MISO is the "slave output". Since SPI is full-duplex, both lines toggles simultaneously, with different data going from master-to-slave, and slave-to-master.
In more details:
If the master had more than one 8-bits data to send/receive, it could keep sending/receiving and de-assert SSEL only when it is done.
An SPI master can communicate with multiples slaves by connecting most signals in parallel and adding SSEL lines, or by chaining the slaves.
With the multiple SSEL lines technique, only one SSEL line is activated at a time, and slaves that are not selected must not drive the MISO line.
SPI can easily achieve a few Mbps (mega-bits-per-seconds). That means it can be used for uncompressed audio, or compressed video.