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FPGA projects - Basic
Music box
LED displays
Pong game
R/C servos
Text LCD module
Quadrature decoder
PWM and one-bit DAC
Debouncer
Crossing clock domains
The art of counting
External contributions

Interfaces
RS-232
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I2C
EPP
SPI
PCI
PCI Express
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SDRAM

Advanced
Digital oscilloscope
Graphic LCD panel
Direct Digital Synthesis
CNC steppers
Spoc CPU core

Hands-on
A simple oscilloscope


FPGA introduction
What are FPGAs?
How FPGAs work
Internal RAM
FPGA pins
Clocks and global lines
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Configuration
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FPGA software
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Pin assignment
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FPGA electronic
SMD technology
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How FPGAs work

Logic-cells

FPGAs are built from one basic "logic-cell", duplicated hundreds or thousands of time. A logic-cell is basically a small lookup table ("LUT"), a D flip-flop and a 2-to-1 mux (to bypass the flip-flop if desired).

The LUT is like a small RAM that can implement any logic function. It has typically a few inputs (4 in the drawing above), so for example an AND gate with 3 inputs, whose result is then OR-ed with another input would fit in one 4-input LUT.

Interconnect

Each logic-cell can be connected to other logic-cells through interconnect resources (wires/muxes placed around the logic-cells). Each cell can do little, but with lots of them connected together, complex logic functions can be created.

IO-cells

The interconnect wires also go to the boundary of the device where I/O cells are implemented and connected to the pins of the FPGAs.

Dedicated routing/carry chains

In addition to general-purpose interconnect resources, FPGAs have fast dedicated lines in between neighboring logic cells. The most common type of fast dedicated lines are "carry chains". Carry chains allow creating arithmetic functions (like counters and adders) efficiently (low logic usage & high operating speed). For more info, check this page.

Older programmable technologies (PAL/CPLD) don't have carry chains and so are quickly limited when arithmetic operations are required.



>>> NEXT - part 3: Internal RAM >>>



This page was last updated on October 14 2013.