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FPGA projects - Basic
Music box
LED displays
Pong game
R/C servos
Text LCD module
Quadrature decoder
PWM and one-bit DAC
Debouncer
Crossing clock domains
The art of counting
External contributions

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Advanced
Digital oscilloscope
Graphic LCD panel
Direct Digital Synthesis
CNC steppers
Spoc CPU core

Hands-on
A simple oscilloscope


FPGA introduction
What are FPGAs?
How FPGAs work
Internal RAM
FPGA pins
Clocks and global lines
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FPGA software
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FPGA electronic
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ISE
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Crossing clock domains

An FPGA design can use multiple clocks. Each clock forms a "clock domain" inside the FPGA, and care needs to be taken if a signal generated in a clock domain is needed in another clock domain.

Crossing in four parts
BTW, to learn about metastablity (or why so much hard work is needed to cross clock domains), check the links below.
Links


>>> NEXT - part 1: Crossing clock domains - Signal >>>



This page was last updated on May 19 2013.