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FPGA projects - Basic
Music box
LED displays
Pong game
R/C servos
Text LCD module
Quadrature decoder
PWM and one-bit DAC
Debouncer
Crossing clock domains
The art of counting
External contributions

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Digital oscilloscope
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A simple oscilloscope


FPGA introduction
What are FPGAs?
How FPGAs work
Internal RAM
FPGA pins
Clocks and global lines
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ISE
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Internal RAM

In addition to logic, all new FPGAs have dedicated blocks of static RAM distributed among and controlled by the logic elements.

Internal RAM operation

There are many parameters affecting RAM operation. The main parameter is the number of agents that can access the RAM simultaneously.

Here's a simplified drawing of a dual-port RAM.

To figure out how many agents are available, count the number of separate address buses going to the RAM. Each agent has a dedicated address bus. Each agent has also a read and/or a write data bus.

Writing to the RAM is usually done synchronously. Reading is usually done synchronously but can sometimes be done asynchronously.

Blockram vs. Distributed RAM

Now there are two types of internal RAMs in an FPGA: blockrams and distributed RAMs. The size of the RAM needed usually determines which type is used.



>>> NEXT - part 4: FPGA pins >>>



This page was last updated on May 19 2013.