Now that we know how to drive 7-segments displays, let's aggregate them to make big counters.

The pin count issue

Let's try to build a big display that uses eight 7-segments displays, so that it can show numbers from 0 to 99999999.
If we build it the straightforward way, we are using 64 FPGA pins.

That's not practical as it's a wiring nightmare.
There must be a better way!

LED multiplexing

Now we are using only 16 FPGA pins.
The trade-off is that only one display out of eight can be lit at any particular time. But if the FPGA switches "fast enough", it seems that all the displays are lit.

"Fast enough" means 100Hz or more.
At 100Hz, a display cycle would last 10ms (and each display would be lit 1.25ms per cycle).

Notes:

• One the drawing, the 8 lower lines control which 7-segment display is enabled, and the 8 upper lines control what is displayed on the enabled 7-segment.
• The current in the 8 lower lines is enabled only 1/8th of the time, but the peak current can be 8 times higher than in the upper lines - so the lower FPGA lines cannot be connected directly like that, but should go through power transistors (not shown on the drawing).

An 8-digits BCD counter example

Here's a counter design that drives a multiplexed 8-digits 7-segments display.
The counter goes from 00000000 to 99999999, then rolls-over.

The design uses 3 modules:

1. BCD1: BCD counter (single digit)
2. BCD8: BCD counter (holds 8 digits)
3. LED_BCD8x7seg: top-level that drives the display by multiplexing 8 digits

Get the file here.

• Opto 5 - LED dot-matrix displays ❯