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Do you have an FPGA board with an LED?
Try this simple design.
module LEDglow(clk, LED); input clk; output LED; reg [23:0] cnt; always @(posedge clk) cnt<=cnt+1; wire [3:0] PWM_input = cnt[23] ? cnt[22:19] : ~cnt[22:19]; reg [4:0] PWM; always @(posedge clk) PWM <= PWM[3:0]+PWM_input; assign LED = PWM[4]; endmodule
Note: Use a "clk" clock signal at around 20MHz.
Otherwise the effect might be too slow or too fast to be appreciated.