JTAG
Most FPGAs support JTAG.
This project comes with a tutorial source code written in C to be used with a Xilinx parallel-III or Altera ByteBlasterMV/II cable.
Get it here.
Links
- A JTAG Boundary Scan presentation from TI (PDF).
- A Boundary Scan Tutorial from ASSET InterTech, Inc. (PDF).
- Boundary-Scan Testing in Altera Devices.
- The SVF Format for Xilinx Devices.
- The AP-630 from Intel.
- The SVF specification from ASSET and TI.