reg Threshold1, Threshold2; always @(posedge clk_flash) Threshold1 <= (data_flash_reg>=8'h80); always @(posedge clk_flash) Threshold2 <= Threshold1; assign Trigger = Threshold1 & ~Threshold2; // if positive edge, trigger! |
reg [8:0] samplecount; |
reg PreTriggerPointReached; always @(posedge clk_flash) PreTriggerPointReached <= (samplecount==256); |
always @(posedge clk_flash) if(~Acquiring) begin Acquiring <= startAcquisition2; // start acquiring? PreOrPostAcquiring <= startAcquisition2; end else if(&samplecount) // got 511 bytes? stop acquiring begin Acquiring <= 0; AcquiringAndTriggered <= 0; PreOrPostAcquiring <= 0; end else if(PreTriggerPointReached) // 256 bytes acquired already? begin PreOrPostAcquiring <= 0; end else if(~PreOrPostAcquiring) begin AcquiringAndTriggered <= Trigger; // Trigger? 256 more bytes and we're set PreOrPostAcquiring <= Trigger; if(Trigger) wraddress_triggerpoint <= wraddress; // keep track of where the trigger happened end always @(posedge clk_flash) if(Acquiring) wraddress <= wraddress + 1; always @(posedge clk_flash) if(PreOrPostAcquiring) samplecount <= samplecount + 1; reg Acquiring1; always @(posedge clk) Acquiring1 <= AcquiringAndTriggered; reg Acquiring2; always @(posedge clk) Acquiring2 <= Acquiring1; assign AcquisitionStarted = Acquiring2; |
reg [8:0] rdaddress, SendCount; reg Sending; wire TxD_busy; always @(posedge clk) if(~Sending) begin Sending <= AcquisitionStarted; if(AcquisitionStarted) rdaddress <= (wraddress_triggerpoint ^ 9'h100); end else if(~TxD_busy) begin rdaddress <= rdaddress + 1; SendCount <= SendCount + 1; if(&SendCount) Sending <= 0; end |