68K SBC using CPLD

Requests, not necessarily related to fpga4fun...

68K SBC using CPLD

Postby tetsu-jp » Sun Feb 12, 2012 9:05 pm

Hello I am trying to design an 68k single board computer.

I have considered and already bought various devices and device programmers.
Recently I changed my consideration, not to use 5v, PAL/GAL anymore,
but to use a MAX7000 CPLD.

The system has 68SEC000, PIC18f86j16, 32K static RAM + MAX7000 CPLD.
It would be possible maybe alternatively to use logic including single gates,
the memory bus sharing is not very complicated. It is still messy to have too many different chips around,
and a CPLD can do it using only one chip.

What are your ideas/comments? I can use SMD parts excluding BGA/QFN.

MAX7000 is not a FPGA but also has JTAG interface. I have not yet found any good forum
for CPLD, usage of older PAL/GAL technology almost seems to have deceased.
There are these devices still available, I have some already, even made the software IDE working.
But they are 5 volts only...

Do you know if it is possible to implement a simple video interface using a small CPLD?
How much logic would be required for this? I am thinking of something like 320x200 in monochrome or 4 gray levels.
Do you have any information about this topic?

I have one MAXII demo board available already + USB Blaster + Altera software installed.
Right now I am working at the PCB layout.
tetsu-jp
 
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