Problems with a latch

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Problems with a latch

Postby bvarley » Sun Jan 01, 2012 8:58 am

Hi, FPGA noobie here. I need a latch which is set by an edge on one signal, and cleared by an edge on another. Here's my code:

Reg Latch
Input Signal1, Signal2

always @ (posedge Signal1) Latch = 1
always @ (posedge Signal2) Latch = 0

That compiles OK, but as soon as I use Latch in another statement, eg:

Set LED = Latch

I get compile errors relating to "can't resolve multiple constant drivers".

There are no other obvious errors, eg. I can send Signal1 to the LED and it works fine.
Obviously I'm not implementing a simple edge triggered latch correctly, assistance would be much appreciated. TIA
bvarley
 
Posts: 12
Joined: Sat Dec 31, 2011 2:01 pm

Re: Problems with a latch

Postby bvarley » Mon Jan 02, 2012 5:28 am

In case it helps anyone, this works. Even though the previous values are rolled over *before* the compare statement. Obviously not the same as C. Cheers

reg PrevIn1 ;
reg PrevIn2 ;

always @ (posedge clk) begin

PrevIn1 <= Input1 ; // Previous values for edge detection.
PrevIn2 <= Input2 ;
if (~PrevIn1 & Input1) Latch = 1 ;
else if (~PrevIn2 & Input2) Latch = 0 ;
end
bvarley
 
Posts: 12
Joined: Sat Dec 31, 2011 2:01 pm


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