Intractable problems with boot PROM verify

[bvarley]

Hi, Firstly, I've done all the obvious things:

Using a MAX232 for Pluto -> PC data line.
Serial I/O program on the FPGA board works fine.
RS232 levels and rise times on computer RxD are fine on a scope.
COM port on the machine concerned used constantly with other systems at 115K, without problems.

If I try to do a PROM burn on my laptop running XP it works fine.

With identical load file, cable, interface and FPGA Pluto-3 board on my desktop, running Win-7 I consistently get a verify error.
FPGAconf version is the same for both. Failurs occur with proven rbf files, such as LEDflasher.

The only difference I can see is XP vs Win-7. Has anyonre experienced anything similar? Any other suggestions? TIA

[fpga4fun]

So you have a WinXP laptop and Win7 desktop. It would be interesting to try Win7 on your laptop or WinXP on your desktop. I doubt the OS is the problem, most likely the machine.