I2C overview
I2C characteristics
- An I2C bus uses only 2 wires (named "SDA" and "SCL") in addition to power and ground
- Can support over 100 devices on the same bus (each device on the bus has an address to be individualy accessible)
- Multi-master (for example, two CPUs can easily share the same I2C device)
- Industry standard (developed by Philips, adopted by many other manufacturers)
- Used everywhere (TVs, PCs...)
- Relatively slow (100Kbps base speed, with extensions up to 3.4Mbps)
- Not plug-and-play
How it works
An I2C bus needs at a minimum an I2C master and an I2C slave.
An I2C master is a transaction initiator (a master can write-to or read-from a slave).
An I2C slave is a transaction recipient (a slave can be written-to or read-from a master).
An I2C transaction starts with a "start" condition, followed by the address of the device we wish to speak to, a bit to indicate if we want to read or write, the data written or read, and finally a "stop".
There are other details, like the need to have an "acknowledge" bit after each byte transmitted... see the waveform below, and the links at the bottom of this page.
I2C waveform
Here's how it looks on the bus.
This a write to an EEPROM at address 0x51, with 2 data bytes 0x50 and 0x0F.
>>> NEXT: I2C slave (method 1) >>>
This page was last updated on December 25 2007.