I2C overview

I2C characteristics

• An I2C bus uses only 2 wires (named "SDA" and "SCL") in addition to power and ground
• Can support over 100 devices on the same bus (each device on the bus has an address to be individualy accessible)
• Multi-master (for example, two CPUs can easily share the same I2C devices)
• Industry standard (developed by Philips, adopted by many other manufacturers)
• Used everywhere (TVs, PCs...)

but

• Relatively slow (100Kbps base speed, with extensions up to 3.4Mbps)
• Not plug-and-play

How it works

An I2C bus needs at a minimum an I2C master and an I2C slave.

An I2C master is a transaction initiator (a master can write-to or read-from a slave).
An I2C slave is a transaction recipient (a slave can be written-to or read-from a master).

I2C waveform

Here's how it looks on the bus.
This a write to an EEPROM at address 0x51, with 2 data bytes 0x50 and 0x0F.

An I2C transaction begins with a "start" condition, followed by the address of the device we wish to speak to, a bit to indicate if we want to read or write, the data written or read, and finally a "stop".
There are other details, like the need to have an "acknowledge" bit after each byte transmitted... see the waveform above, and the project's links.

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This page was last updated on April 01 2010.