Here's a view of the DB25 printer connector coming from your PC.
The pins 2 to 9 are the 8-bits bus. In EPP mode, the 8-bits bus is bi-directional.
There other important pins are:
|17||address strobe||PC -> FPGA||low||address transaction|
|14||data strobe||PC -> FPGA||low||data transaction|
|11||wait||FPGA -> PC||low||response to strobe|
|1||write||PC -> FPGA||low||0 for write transactions, 1 for read transactions|
You can see that there are 2 "strobe" signals plus a "wait" signal. The "strobes" are coming from the PC, while the "wait" is going to the PC.
Here's how this works: for every transaction, the PC asserts one of the strobe and the FPGA responds with the wait.
Let's pick one strobe signal (only one is activated at a time) and let's look at an EPP transaction:
All this is done in hardware; the PC software doesn't have to do anything besides starting the transaction.